IPC-4761

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IPC-4761

Design Guide for Protection of Printed Board Via Structures

The Principles of Standardization

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IPC-4761

Design Guide for Protection of Printed Board Via Structures

Developed by the Via Protection Task Group (D-33d) of the Rigid Printed Board Committee (D-30) of IPC

Users of this publication are encouraged to participate in the development of future revisions.

Contact:

IPC 3000 Lakeside Drive, Suite 309S Bannockburn, Illinois 60015-1219 Tel 847 615.7100 Fax 847 615.7105

This Page Intentionally Left Blank

Acknowledgment

Any document involving a complex technology draws material from a vast number of sources. While the principal members of the Via Protection Task Group (D-33d) of the Rigid Printed Board Committee (D-30) are shown below, it is not possible to include all of those who assisted in the evolution of this standard. To each of them, the members of the IPC extend their gratitude.

| Rigid Printed Board Committee | Via Protection Task Group | Technical Liaisons of the IPC Board of Directors | |---------------------------------|-------------------------------------------|----------------------------------------------------| | Chair | Chair | | | Susan Hott | Susan Hott | Peter Bigelow | | Robisan Laboratory | Robisan Laboratory | IMI Inc. | | | C. Don Dupriest | Sammy Yi | | | Lockheed Martin Missiles and Fire Control | Flextronics International |

Via Protection Task Group

David R. Backen, TTM Technologies

Scott A. Bowles, Hallmark Circuits Inc.

Mark Buechner, BAE Systems

Dennis J. Cantwell, Printed Circuits Inc.

Rick Carlson, Taiyo America Inc.

Denise Chevalier, Amphenol TCS

Thomas Clifford, Lockheed Martin Space Systems Company

Christopher Conklin, Lockheed Martin Corporation

David J. Corbett, Defense Supply Center Columbus

Werner Engelmaier, Engelmaier Associates, L.C.

Alan Exley, Cosmotronic

Thomas G. Farrell, Underwriters Labs Inc.

Dennis Fritz, MacDermid, Inc.

Lionel Fullwood, WKK Distribution Ltd.

Mahendra S. Gandhi, Northrop Grumman

Michael R. Green, Lockheed Martin Space Systems Company

Michael E. Hill, Colonial Circuits Inc.

Thomas E. Kemp, Rockwell Collins

Dana W. Korf, Sanmina-SCI Corporation

Steve Larson, Amphenol TCS

Gary B. Long, Intel Corporation

Michael G. Luke, C.I.D., Raytheon Company

James F. Maguire, Intel Corporation

Chris Mahanna, Robisan Laboratory Inc.

Kenneth J. Manning, Raytheon Company

Brian C. McCrory, Delsen Testing Laboratories

Susan Morgana, United Technologies

Peter A. Navarro, BAE Systems

Diana Niesser, Huntsman Advanced Materials

Benny Nilsson, Ericsson AB

Stephen G. Pierce, SGP Ventures, Inc.

Randy R. Reed, Merix Corporation

Karl A. Sauter, Sun Microsystems Inc.

Joseph C. Schmidt, Raytheon Missile Systems

Bob Sheldon, Pioneer Circuits Inc.

Gordon Sullivan, Huntsman Advanced Materials

Dung Q. Tiet, Lockheed Martin Space Systems Company

David A. Vaughan, Taiyo America, Inc.

Vicka White, Honeywell Inc.

Dewey Whittaker, Honeywell Inc.

Michael W. Yuen, Foxconn EMS, Inc.

Table of C ontents

| 1 | SCOPE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . | . 1 | 6.3 | Moisture Absorption . . . . . . . . . . . . . . . . . . . . . . . | 11 | |---------------------------------------------|---------------------------------------------------------------------------------------------------------------------------|---------|------------|----------------------------------------------------------------------------------------------------------------------|------| | 1.1 | Purpose . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . | . 1 | 6.4 | Cleanliness Concerns . . . . . . . . . . . . . . . . . . . . . . | 11 | | 1.2 | Terms and Definitions . . . . . . . . . . . . . . . . . . . . . | . 1 | 6.5 | Use of Conformal Coating . . . . . . . . . . . . . . . . . | 11 | | 2 | APPLICABLE DOCUMENTS . . . . . . . . . . . . . . . . | . 1 | 7 | SAMPLE DESIGNS . . . . . . . . . . . . . . . . . . . . . . . . . . . . | 11 | | 2.1 | IPC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . | . 1 | 8 | EXAMPLES OF DRAWING NOTES . . . . . . . . . . . . | 12 | | 3 | PWB FABRICATION AND ASSEMBLY GUIDELINES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . | . 2 | | Figures | | | 3.1 | Advantages of Via Protection . . . . . . . . . . . . . | . 2 | Figure 1-1 | Bumped Via Protection Material . . . . . . . . . . | . 1 | | 3.2 | PWB Fabrication Issues . . . . . . . . . . . . . . . . . . . | . 2 | Figure 1-2 | Dimpled Via Protection Material . . . . . . . . . . | . 1 | | 3.2.1 | Fill or Plug Separation from Plated Hole Wall . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . | . 3 | Figure 1-3 | Planarized and Capped Via Protection Material . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . | . 1 | | 3.2.2 | Voids . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . | . 3 | Figure 3-1 | Example of Hole Fill/Plug Separation from Plated Hole Wall . . . . . . . . . . . . . . . . . . . . . . . . | . | | 3.3 | Assembly Process Issues . . . . . . . . . . . . . . . . . . | . 3 | Figure 3-2 | Example of Depression Within Fill/Plug . . . . . . . . . . . . | 3 | | 3.4 | Long Term Reliability Concerns . . . . . . . . . . | . 4 | | Material . . . . . . . . . . . . . . . . . . . . | . 3 | | 4 MATERIALS/DESIGN CONSIDERATIONS . . . . . | 4 MATERIALS/DESIGN CONSIDERATIONS . . . . . | . 4 | Figure 3-3 | Voids in Via Fill Material . . . . . . . . . . . . . . . . . | . 3 | | 4.1 | End Use Considerations . . . . . . . . . . . . . . . . . . . | . 4 | Figure 3-4 | Large Voids in Via Fill Material . . . . . . . . . . . | . 3 | | 4.2 | Fabrication Considerations . . . . . . . . . . . . . . . . | . 5 | Figure 3-5 | Corroding of Hole Wall Plating Resulting from Single-Side Via Protection . . . . . . . . . . . . . . . | . 4 | | 4.3 | Assembly Considerations . . . . . . . . . . . . . . . . . | . 5 | Figure 5-1 | Examples of Type I Tented Vias . . . . . . . . . . | . 6 | | 4.4 | Types of Materials for Filled/Plugged . . . . . | . 5 | Figure 5-2 | Examples of Type II Tented and Covered Vias . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . | | | 4.4.1 | Non-conductive (Organic) - Non-imageable | . 5 | | . . . Examples of Type III Plugged Vias . | . 7 | | 4.4.2 | Non-conductive - Photoimageable . . . . . . . . | . 5 | Figure 5-3 | . . . . . . | . 8 | | 4.4.3 | Conductive Ink . . . . . . . . . . . . . . . . . . . . . . . . . . . | . 5 | Figure 5-4 | Examples of Type IV Plugged and Covered Vias . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . | . 8 | | 4.5 | Materials for Tented/Covered Via Structures | . 5 | Figure 5-5 | Example of Type V Filled Via . . . . . . . . . . . . | . 9 | | 4.5.1 | Tented Only . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . | . 5 | Figure 5-6 | Examples of Type VI Filled and Covered Vias, Dry Film Cover . . . . . . . . . . . . . . . . . . . . . . . . . . | 9 | | 4.5.2 | Tented and Covered . . . . . . . . . . . . . . . . . . . . . . . | . 5 | | Examples of Type VI Filled and Covered Vias, . . | . | | 4.6 | Material Specification and Selection . . . . . . | . 6 | Figure 5-7 | Liquid Film Cover . . . . . . . . . . . . . . . . . . . . . | . 9 | | 5 VIA PROTECTION DEFINITIONS AND TYPES . | 5 VIA PROTECTION DEFINITIONS AND TYPES . | . 6 | Figure 5-8 | Examples of Type VII Filled and Capped Via . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . | 10 | | 5.1 | Tented Via (Type I Via) . . . . . . . . . . . . . . . . . . . | . 6 | Figure 5-9 | Examples of Partially Filled Vias . . . . . . . . . | 10 | | 5.2 | Tented and Covered Via (Type II Via) . . . . | . 7 | Figure 7-1 | Illustration of 'Tented and Covered' Via | | | 5.3 | Plugged Via (Type III Via) . . . . . . . . . . . . . . . . | . 8 | | Protection Method . . . . . . . . . . . . . . . . . . . . . . . | 11 | | 5.4 | Plugged and Covered Via (Type IV Via) . . | . 8 | Figure 7-2 | Design Rule formula with exploded view of tent and cover detail . . . . . . . . . . . . . . . . . . . . | | | 5.5 | Filled Via (Type V Via) . . . . . . . . . . . . . . . . . . . Filled and Covered Via (Type VI Via) . . . . | . 9 . 9 | Figure 7-3 | Top View Illustration of Solder Mask Clearance around a BGA Pad . . . . . | 11 | | 5.6 | VII Via) | 9 | | . . . . . . Top View Illustration of Overlap Detail | 12 | | 5.7 | Filled and Capped Via (Type . . . . | . | Figure 7-4 | for | | | | Partially Filled Via . . . . . . . . . . . . . . . . . . . . . . . | 10 | | Tent and Covered Vias . . . . . . . . . . . . . . . . . . | 12 | | 5.8 | | | | | | | 6 PERFORMANCE TRADEOFFS | . . . . . . . . . . . . . . . | 10 | | Tables | | | 6.1 | Planarity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . | 10 | Table 5-1 | Application Guidelines for Via Protection . . . | | | 6.2 | Via Metallization . . . . . . . . . . . . . . . . . . . . . . . . . | 10 | | Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . | . 6 |

1 SCOPE

The protection of through vias within Printed Wiring Boards (PWB) has evolved from limited use to common practice. Technology has evolved where via fabrication techniques and protection methodologies need to be defined to allow current designs to be manufacturable at an acceptable yield and cost. Numerous techniques and objectives exist, and will be discussed in this document. This document is the product of the IPC D-33d Via Protection Task Group and has been developed to provide guidance for the designer and fabricator on how via protection should be approached as well as guidance on how via protection should be specified in procurement documentation.

• 1.1 Purpose This guideline provides PWB designers, fabricators and/or users with information on existing methods for the protection of vias on printed boards. In addition to detailing some of the advantages of via protection, production and material issues are given to aid the user in evaluating the benefits and concerns for each type of protection.
• 1.2 Terms and Definitions The definition of all terms used herein shall be as specified in IPC-T-50 and as defined below.

Bumped Via Protection - Via protection where the hole plugging or fill material protrudes above the surface of the hole interface producing a convex shape. See Figure 1-1.

Figure 1-1 Bumped Via Protection Material

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Dimpled Via Protection - Via protection where the hole plugging or fill material recedes below the hole interface producing a concave shape. See Figure 1-2.

1 www.ipc.org

Design Guide for Protection of Printed Board Via Structures

Figure 1-2 Dimpled Via Protection Material

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Planarized Via Protection - Via protection where the excess hole plugging or fill material protruding above the hole interface has been removed by a process to produce a coplanar surface. See Figure 1-3.

Figure 1-3 Planarized and Capped Via Protection Material

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2 APPLICABLE DOCUMENTS

2.1 IPC 1

IPC-T-50 Terms and Definitions for Interconnecting and Packaging Electronic Circuits

IPC-A-600 Acceptability of Printed Boards

IPC-SM-840 Qualification and Performance of Permanent Solder Mask

IPC-2221 Generic Standard on Printed Board Design

IPC-6012 Qualification and Performance Specification for Rigid Printed Boards

3 PWB FABRICATION AND ASSEMBLY GUIDELINES

Interconnect vias are utilized in routing high-density surface mount components. They provide continuity between the lands on the PWB surface and internal circuitry connections. They are located in close proximity to the lands and the component in order to minimize signal length and to avoid interference with other circuitry on the outer layer. Because they are close to both the component body and the solder joint, care must be taken in the design to avoid harm to either.

There are a number of advantages with providing protection for interconnect vias; however, there are just as many production issues within the PWB fabrication and assembly processes that users must consider.

3.1 Advantages of Via Protection Some of the advantages of protecting vias include the following, though not every advantage is applicable for every via protection type described in 5.1 through 5.7:

• Prevent corrosion caused by PWB fabrication processes such as plating or flux residue, from either fabrication or assembly, from passing through or becoming trapped in plated-through holes (PTHs).
• Improve vacuum handling, placement of surface mount technology (SMT) parts by sealing the surface and to prevent air leakage during In Circuit Test (ICT). Unfilled through hole via holes may contribute to intermittent test probe contact as a result of probe contamination when air is pulled through the unfilled via.
• Prevent solder ball blowout during assembly processes, i.e., wave or reflow, that utilize solder paste
• Prevent solder mask creep into holes
• Reduces solder paste loss
• Isolate via holes of conventional PWB products within the assembly soldering process to prevent migration, shorts, and contamination entrapment under components
• Fill/Flush Vias within build-up cores to ensure planarity for subsequent dielectric layer formation and dielectric separation, or to assure adequate resin fill in the subsequent bonding process
• Prevent migration of adhesives and encapsulants used during assembly under rigid area array integrated circuit (IC) packaging substrates.
• Prevent flux from flowing through vias which can inhibit the curing of bonding adhesives.

For specific advantages of each protection type, see Table 5-1.

3.2 PWBFabrication Issues There are a number of issues in the PWB fabrication process that need to be taken into consideration when evaluating a protection methodology, including the following:

• Partial plugging can result in solder from the Hot Air Solder Level (HASL) operation being trapped within the vias. During subsequent reflow soldering the solder can be expelled by trapped gasses forming large solder balls on the surface.

• Application of final finishes following single-sided techniques can result in circumferential voids within the surface finish in vias being tented or plugged and may result in reliability issues such as corrosion of exposed copper.

• Adhesion of tent or plug material to final finishes.

• Plugging of vias from both sides of the hole results in manufacturability and reliability issues.

• Process methods and/or manufacturing complexity may vary depending upon the requirements of the end-customer application.

• Hole fill or plug with either solder mask or epoxy fill compound can be difficult to perform depending upon the process used. Voids within high modulus fill or plug materials can be a significant concern, particularly when those voids are in direct contact with the PTH wall, causing a long-term reliability stress riser. Check with specific fill material manufacturer to determine if modulus data is available. Voids located near the surface SMT contact pad are also cause for concern. For these reasons, voids should be kept to a minimum.

• The Coefficient Thermal Expansion (CTE) mismatch characteristic is known to sometimes cause barrel cracks within the hole wall.

• Use of partial via plugging should only be done after application of inert final surface finishes to avoid potential chemical attack to the via hole wall. Partial plugging or tenting from one side can result in bare copper in the via. See 3.4 for additional information on chemical entrapment in plugged vias.

• Application of HASL final finish prior to partial via plugging requires a unique plug operation. HASL imparts a melting metal coating to the copper via wall which is very different from non-melting metal applications; there is consequently no adhesion of the plug material to the barrel of the via, so the plug must be anchored to the laminate and/or solder mask surface surrounding the via for it to stay in place during soldering.

• Utilization of a final finish that does not contain inert metals, such as organic solderability preservative (OSP) coatings, can be a concern for protecting hole wall copper from corrosion. When using OSP finishes it is recommended to use a complete fill operation (see 5.5) or a two-sided tent and cover application (see 5.2).

• Liquid Photo-Imageable (LPI) solder mask is often used to plug vias. However, any solvent containing ink which is forced into a via hole will have difficulty drying the plug of ink in the hole and residual solvents can ″ pop ″ later during soldering operations. Also, LPI inks rely on UV and/or thermal energy for their cure, making it difficult to get sufficient UV light down through the plug to get good cure. There are however LPI fill materials on the market that have been specifically optimized for UV cure and, in such cases, high aspect ratio vias are a nonissue for curing.

• Electroless nickel immersion gold (ENIG) plating offers variation in plugged via structures. The plugging operation can be performed before or after metallization. One instance utilizes an LPI dot pattern to open the vias, followed by ENIG metallization and then plugging from one side (see 5.3). Another instance utilizes metallization first followed by a plug operation with a subsequent LPI covering (see 5.4). The resulting difference in appearance among the two techniques is the opening in the LPI that is required to allow the plating into the hole.

3.2.1 Fill or Plug Separation from Plated Hole Wall

There exists the potential for separation of the fill or plug material from the knee of the plated hole which may entrap chemistry as shown in Figure 3-1. When establishing a protection methodology it is recommended that a maximum allowable depth be established for both hole fill separation and dimples, as shown in Figure 3-1 and 3-2.

Figure 3-1 Example of Hole Fill/Plug Separation from Plated Hole Wall

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3.2.2 Voids Voids can be a concern where material is used to provide a partial plug or complete fill of a via. See Figure 3-3 and Figure 3-4 for examples of voids in via fill material.

3.3 Assembly Process Issues There are several issues in the assembly process that are unique:

• The use of a solder paste stencil requires contact with a flat surface topography to provide a gasketing effect around the solder pad openings.

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Figure 3-2 Example of Dimples Within Fill/Plug Material

Figure 3-3 Voids in Via Fill Material

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Figure 3-4 Large Voids in Via Fill Material

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• Bump height, which is defined as the difference between the height of the mask over the via and the height of the adjacent solderable land, can affect or interrupt the solder stencil paste application. It has been commonly noted in industry that a bump height of 0.076 mm [0.003 in] or greater can cause a non-contact effect on the application of solder paste.

• Vias can serve as a reservoir to entrap flux or other contaminates that become difficult or impossible to clean. This is all especially true when they lie under the component outline.

• Vias can act as a thermal path to draw away solder volume from the solder joint.

• Via cracking at solder reflow temperatures.

• Entrapped air, when heated, will expand and crack the solder mask tent or cover material. This allows the solder mask tent over the vias to expand upward creating coplanarity issues. During this air expansion the pushing of the tent upwards can result in a crack due to this pressure. This cracking can create an opening and trap solutions within what has become a semi-sealed via.

3.4 Long-Term Reliability Concerns Single-sided via protection (Types I-a, II-a and III-a) should not be used with bare copper hole walls. Any attempt to apply a surface finish to a hole wall that is not protected by the plug material resulting from a partial penetration into the via will result in a bare copper area at the plug material/hole barrel interface. This bare copper area will be attacked by any chemicals entrapped within the hole during board fabrication, as well as those trapped during assembly processes (the partial plug process may have gaps between the plug material and the hole wall allowing entrapment of chemicals). The resulting contamination can combine with moisture and corrode the thickness of the hole wall plating to a degree where the plating is no longer able to withstand the stresses of operating temperatures common in assembly processes as shown in Figure 3-5. Final finishes should be applied prior to plugging.

Figure 3-5 Corroding of Hole Wall Plating Resulting from Single-Side Via Protection

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4 MATERIALS/DESIGN CONSIDERATIONS

Materials currently being used to protect vias include standard liquid photoimageable and non-imageable solder masks, dry film solder masks, specially formulated hole plugging inks, conductive inks, liquid dielectric materials and even materials not used in other PWB constructions.

When selecting or approving materials to protect vias in PWBs there are a number of performance criteria for the material that should be considered based upon how the PWBs are designed and used. For example, the material could be totally encapsulated inside a multilayer structure in an innerlayer, or exposed to the outside environment, or something in between. The end use will determine the specific material characteristics needed for the application.

The key questions deal with the use of the material in the PWB construction, and the reason(s) why the vias must be protected or plugged. Some typical reasons for protecting vias are to:

• Prevent solder and chemistry from migrating to the opposite side of the board in assembly
• Prevent contamination from migrating into bare copper surface finish holes/vias
• Assure good vacuum in bed-of-nails electrical testing
• Prevent solder wicking into vias, causing insufficient solder joints
• Increase circuit density - when the protected vias are very close to component mounting pads
• Recover real estate - as in via-in-pad where the material must be plated over
• Prevent resin starvation or voids in sub-composite vias in multi-layer lamination
• Provide electrical or thermal conductivity

Those specifying protected vias need to understand the importance of the cost/benefit relationship. Protection of vias often requires the use of specially developed materials. The plugging process can require additional investment in equipment and/or be labor-intensive, both of which are cost adders. Because of the wide range of materials and equipment employed for via filling, one should expect a significant variation in finished quality and ease of inspection.

4.1 End Use Considerations The operating environment of the finished assembly will dictate the performance parameters that the hole filling material must withstand. Some examples are:

• Humidity - PWBs that will be exposed to high humidity should pass hydrolytic stability testing

• Maximum operating temperature - CTE and Glass Transition Temperature (Tg) may be important for high temperature applications

• Temperature cycling and thermal shock - If the PWB must pass this testing, the plugging material must also be tested with the board. Test coupons on panels should have all via protection styles used on the board represented.

• Non-nutrient testing - Applies to the plugging material if exposed to the environment

• Outgassing - A particular concern if the material is inside a multilayer or plated over, or in space applications

From a design perspective, some features that have an effect upon the material selection and degree of difficulty for filling are:

• Diameter of vias - Very small holes can take longer to fill or plug; very large holes may be difficult as well
• Aspect ratio - High aspect ratio holes are more difficult to fill or plug
• Circuit Density (The proximity of exposed pads to protected vias) - A photoimageable plugging material may be needed to prevent contamination that would cause assembly defects
• Electrical Testing Requirements - The desire to have a partially filled via such that a pad on one side may be used as a test point may dictate the PWB construction (surface finish) and plugging material selection

4.2 Fabrication Considerations The PWB fabricator will often have several different materials that can be selected to protect vias. The choice is generally the material that:

• 1. Is already specified, approved or qualified in the facility and/or by the Electronics Manufacturing Services (EMS) customer
• 2. Gives the minimum cost and highest yield in production
• 3. Provides the least disruption to process flow
• 4. Is compatible with existing equipment and processes in the shop including:
• Application with minimal voids
• Curing (Thermal or UV)
• Planarization Plating (if required)
• 5. Is already listed in the fabricator's UL Flammability file

4.3 Assembly Considerations The material used to plug the vias must survive all of the conditions and chemistries that will be seen by the PWBs in assembly without failure. Although the plug material does not typically need the electrical performance of a solder mask, it will need to have certain physical, thermal and chemical properties. Some of the issues for selecting a via protection material are:

• 1. Assembly temperatures and chemistries - The material must be capable of withstanding typical process conditions that will be seen by the PWB.
• 2. Planarity requirements - This includes:
• Height restrictions to prevent assembly defects
• Amount of shrinkage during processing to avoid non-planarity (dimples) in the final plug
• If plated, the adhesion of the plating to the plug to avoid 'doming' of the plating
• 3. Flux and cleaner compatibility
• 4. Conformal coating compatibility
• 5. Substrate compatibility

4.4 Types of Materials for Filled/Plugged Via holes are typically filled by either screen printing, direct squeegee or with a pressurized applicator. The ease of filling depends upon the via diameter and aspect ratio, viscosity of the plugging material, particle size of filler particles, and the filling equipment and process parameters.

4.4.1 Non-conductive (Organic) - Non-imageable Nonconductive, non-imageable materials are polymeric and may be filled with materials that increase viscosity and inhibit shrinkage during processing and curing. They are usually cured with thermal and/or UV energy. They can be used in most any application except where enhanced thermal or electrical conductivity is needed. Some of these materials are not easily plated, so, if plating over the material is needed, it is important to verify platability with the supplier and fabricator.

4.4.2 Non-conductive -Photoimageable Photoimageable materials are characterized by their ability to be used in very high circuit density areas such as Ball Grid Array (BGA) patterns without danger from bleeding or smearing of the plugging material onto component mounting pads that will inhibit soldering. Any material outside the imaged area will be developed off, leaving all component pads clean.

4.4.3 Conductive Ink Conductive hole plugging materials are polymer-based and filled with metal particles, usually silver or copper. The post-cure thermal and electrical characteristics depend upon the properties of the chosen polymer and metal composition. High metal loading of these materials tends to reduce the shrinkage induced by curing. It may also improve the ease of plating since the metal is conductive and autocatalytic (and may not require swell and etch or electroless plating).

4.5 Materials for Tented/Covered Via Structures

4.5.1 Tented Only Tenting involves the use of dry film solder mask (liquid solder mask will not tent holes). For tenting applications that will not be covered with a liquid solder mask, a thicker dry film (greater than or equal to 0.076 mm [0.003 in]) should be used to provide the needed integrity to the tent.

4.5.2 Tented and Covered With this application a thinner dry film solder mask (less than or equal to 0.058 mm [0.0023 in]) may be considered to keep overall thickness of mask over the annular ring of the via below the maximum allowed. The thickness of the liquid mask that covers the tent may also need to be minimized to help keep overall thickness within specification.

4.6 Material Specification and Selection In many cases it is important for the via plug or fill material, or the desired properties of the material, to be specified. The following is a list of parameters to be considered:

• 1. For all applications:
• Flammability - Materials must be UL approved if the PWB is UL certified
• Plating - When required, capable of being plated uniformly
• Plating adhesion - Minimize separation from the fill material during subsequent processing when required.
• Fill or Plug Adhesion - When required, materials must not separate from any metallized surface
• Voids - Degree of voiding within via fill material
• 2. When Fully Encapsulated (by plating or inside a multilayer structure):
• CTE
• Tg
• Outgassing
• 3. When Exposed to the Environment (not fully encapsulated)
• Hydrolytic Stability
• Non-nutrient
• Compatibility with other processes or materials including:
• a) Assembly flux
• b) Assembly post cleaning chemistry
• c) Conformal coating (adhesion issue)
• 4. For plating applications:
• Ease of planarization before plating
• Shrinkage during processing/curing (dimple issue)
• Ability to roughen, catalyze and plate easily (organic fill materials)
• 5. PWB Density Issues:
• Material may need to be photo-imageable if intended for application over fine pitch surface features.
• 6. Special Requirements:
• Thermal Conductivity
• Electrical Conductivity
• NASA Outgassing
• Color for Final Inspection

5 VIA PROTECTION DEFINITIONS AND TYPES

The types of via protection currently identified by the IPC D-33d IPC Via Protection Task Group are depicted in this section. It should be noted that Figure 5-1 through Figure

5-8 do not illustrate all of the surface possibilities, including dimples, bumps or planarized surfaces in the mask material, that are commonly found over the hole. See Table 5-1 for a listing of application guidelines identifying those protection types best suited for a given process. Descriptions of specific via protection types can be found in 5.1 through 5.7.

The PWB designer may specify requirements or degree of planarity depending on end-item needs and manufacturing capability.

• 5.1 Tented Via (Type I Via) A via with a dry film mask material applied bridging over the via wherein no additional materials are in the hole (see Figure 5-1). It may be applied to one side (Type I-a) or both sides (Type I-b) of the via structure:

Single Sided Tented Not Recommended

<!-- image -->

Figure 5-1 Examples of Type I Tented Vias

Type I-a

Process: Vacuum laminated film material that is photodefinable.

Benefits: A consistent and repeatable process providing excellent hole tenting and uniform thickness.

Concerns: Protection should not be used with bare copper hole walls (see 3.4). Chemical entrapment. Requires specialized application equipment and handling regarding cleanliness to meet Surface Insulation Resistance (SIR) requirements and damage. Unsupported films have the potential for puncture. Inert final finishes should be applied prior to tenting to prevent entrapment. Tents are not recommended over melting metal finishes; however, if applied then the tent

Table 5-1 Application Guidelines for Via Protection Types 1

| | Applications | Applications | Applications | Applications | Applications | Applications | Applications | Applications | Applications | Applications | |------------------------------------------|-----------------------|---------------------------------------|--------------------------------------------|------------------------------------------------------------|-----------------------------------------------------------|-----------------------------------|-------------------------------------------|----------------------------|-----------------------------------|--------------------------------------------------------------------| | Description (Type) | Before Fi- nal Finish | After Non- Melting Metal Final Finish | Prevent air leakage in ICT (Vacuum Seal) 2 | Keeping chemistry or solder from pass- ing through the via | Keeping chemistry or solder from being trapped in the via | Dielectric protection of via land | Fill holes in cores prior to lamina- tion | Improves surface planarity | Best For thermal conductiv- ity 3 | Prevent migration of solder, adhesives or encap- sulants into vias | | Tented - Single-Sided (Ia) | NOT RECOMMENDED 5 | NOT RECOMMENDED 5 | NOT RECOMMENDED 5 | NOT RECOMMENDED 5 | NOT RECOMMENDED 5 | NOT RECOMMENDED 5 | NOT RECOMMENDED 5 | NOT RECOMMENDED 5 | NOT RECOMMENDED 5 | NOT RECOMMENDED 5 | | Tented - Double-Sided (Ib) | X | X | X | X | X | X | | | | X | | Tented and Covered - Single-Sided (IIa) | NOT RECOMMENDED 5 | NOT RECOMMENDED 5 | NOT RECOMMENDED 5 | NOT RECOMMENDED 5 | NOT RECOMMENDED 5 | NOT RECOMMENDED 5 | NOT RECOMMENDED 5 | NOT RECOMMENDED 5 | NOT RECOMMENDED 5 | NOT RECOMMENDED 5 | | Tented and Covered - Double-Sided (IIb) | X | X | X | X | X | X | | | | X | | Plugged - Single- Sided (IIIa) | NOT RECOMMENDED 5 | NOT RECOMMENDED 5 | NOT RECOMMENDED 5 | NOT RECOMMENDED 5 | NOT RECOMMENDED 5 | NOT RECOMMENDED 5 | NOT RECOMMENDED 5 | NOT RECOMMENDED 5 | NOT RECOMMENDED 5 | NOT RECOMMENDED 5 | | Plugged - Double- Sided (IIIb) | X | X | X | X | X | X | | X | | X | | Plugged and Covered - Single-Sided (IVa) | NOT RECOMMENDED 5 | NOT RECOMMENDED 5 | NOT RECOMMENDED 5 | NOT RECOMMENDED 5 | NOT RECOMMENDED 5 | NOT RECOMMENDED 5 | NOT RECOMMENDED 5 | NOT RECOMMENDED 5 | NOT RECOMMENDED 5 | NOT RECOMMENDED 5 | | Plugged and Covered Double-sided (IVb) | X | X | X | X | X | X | | | | X | | Filled (fully plugged) (V) | X | X | X | X | X | | X | X | X | X | | Filled and Covered (VI) | X | X | X | X | X | X | | | | X | | Filled and Capped (VII) 4 | X | X | X | X | X | | X | X | X | X |

1. Descriptions of specific types of via protection are provided in 5.1 through 5.7.

2. Not recommended over melting metals.

3. It is recommended to use a thermally conductive hole filling ink (e.g. silver ink).

4. When specifying Via-in-Pad, it is recommended that Type VII via protection be used.

5. See 3.4 for concerns associated with single sided via protection.

should extend beyond the pad to cover laminate material in order to prevent lifting of the tent material during subsequent soldering operations. Dimples may be a concern for adhesive processes where a glue dot is used for component placement.

Type I-b

Process: Vacuum laminated film material that is photo-definable.

Benefits: A consistent and repeatable process providing excellent hole-tenting and uniform thickness. This process typically results in a clean hole.

Concerns: Requires specialized application equipment and handling regarding cleanliness to meet SIR requirements and damage. Unsupported films have the potential for puncture. Dimples may be a concern for adhesive processes where a glue dot is used for component placement.

5.2 Tented and Covered Via (Type II Via) A Type I via with a secondary covering of mask material applied over the tented via (see Figure 5-2). The material may be applied to one side (Type II-a) or both sides (Type II-b) of the via structure:

Type II-a

Process: Application of mask over Type I.

Benefits: Improved tenting strength over Type I.

Single Sided Tented and Covered Not Recommended Figure 5-2 Examples of Type II Tented and Covered Vias

<!-- image -->

Concerns: Increased processing and height of multiple coatings. Dimples may be a concern for the adhesive process where a glue dot is used for component placement. Chemical entrapment. Inert final finishes should be applied prior to tenting to prevent entrapment. Tents are not recommended over melting metal finishes; however, if applied then the tent should extend beyond the pad to cover laminate material in order to prevent lifting of the tent material during subsequent soldering operations.

Type II-b

Process: Application of mask over Type I.

Benefits: Improved tenting strength over Type I.

Concerns: Increased Processing and height of multiple coatings. Dimples may be a concern for the adhesive process where a glue dot is used for component placement. Usage of standard dry film mask material will result in significant bump height. Bumps may be a concern in lifting the solder paste stencil. A conforming mask material is recommended to prevent significant increases in bump height.

5.3 Plugged Via (Type III Via) Avia with material applied allowing partial penetration into the via (see Figure 5-3). The plug material may be applied from either one side (Type III-a) or both sides (Type III-b) of the via structure.

Single Sided Plugged Not Recommended Figure 5-3 Examples of Type III Plugged Vias

<!-- image -->

Type III-a

Process: Screened and Roller Coated.

Benefits: Ease of processing. There are few manufacturing constraints.

Concerns: Protection should not be used with bare copper hole walls (see 3.4). The plug material may protrude out one side of the via. Outgassing.

Type III-b

Process: Screened and Roller Coated.

Benefits: Ease of processing. There are few manufacturing constraints.

Concerns: Thermally induced volumetric expansion of entrapped contaminants or air for Type III-b. Air expansion or even entrapped solvents can have a significant effect on plugs as they are being cured, causing ″ blow-out ″ . Process is difficult to produce consistently with thermally cured materials and LPI. Aspect ratio is a concern for the open part of a hole so that there can be sufficient removal of chemistries. See application guidelines in Table 5-1 for final finish applications.

5.4 Plugged and Covered Via (Type IV Via) AType III via with a secondary covering of material applied over the via (see Figure 5-4). The plug and secondary covering material may be applied from either one side (Type IV-a) or both sides (Type IV-b) of the via structure.

Single Sided Plugged and Covered Not Recommended Figure 5-4 Examples of Type IV Plugged and Covered Vias

<!-- image -->

Type IV-a

Process: Application of mask over Type III.

Benefits: Increased plug strength. Pin holes that occur through the use of Type III plugging can be mitigated through the use of this type.

Concerns: Protection should not be used with bare copper hole walls (see 3.4). Final finishes should be applied prior to plugging.

Type IV-b

Process: Application of mask over Type III.

Benefits: Increased plug strength. Pin holes that occur through the use of Type III plugging can be mitigated through the use of this type.

Concerns: Thermally induced volumetric expansion of entrapped contaminants or air for Type IV-b. Air expansion or entrapped solvents can have a significant effect on plugs as they are being cured, causing ″ blow-out ″ . Process is difficult to produce consistently with thermally cured materials and LPI.

5.5 Filled Via (Type V Via) A via with material applied into the via targeting a full penetration and encapsulation of the hole (see Figure 5-5).

Figure 5-5 Example of Type V Filled Via

<!-- image -->

Process: Screened, roller-coated, or squeegeed.

Benefits: Complete fill of conductive or non-conductive material which eliminates contaminants. Process prevents solder balling. Benefits useful in sequential lamination processes.

Concerns: Voiding. The removal of excess material from the surface. Surface planarity. Complete curing. Excess process variables. Complexity of obtaining complete fill. CTE mismatch between the fill material and substrate.

5.6 Filled and Covered Via (Type VI Via) A Type V via with a secondary covering of material (liquid or dry film soldermask) applied over the via (see Figure 5-6 and Figure 5-7). The covering material may be applied from either one side (Type VI-a) or both sides (Type VI-b) of the via structure:

Process: Application of mask over Type V. Fill material can be electrically and/or thermally conductive depending on end use.

Benefits: Protection of the pad over Type V. The effects of surface voids possibly caused by using Type V method can be minimized with Type VI.

Figure 5-6 Examples of Type VI Filled and Covered Vias, Dry Film Cover

<!-- image -->

Figure 5-7 Examples of Type VI Filled and Covered Vias, Liquid Film Cover

<!-- image -->

Concerns: Same as Type V with additional processing.

5.7 Filled and Capped Via (Type VII Via) A Type V via with a secondary metallized coating covering the via (see Figure 5-8). The metallization is on both sides:

Process: Metallized coating over Type V. Applicable where high density features are required.

Benefits: Via-In-Pad and Ball-on-Via pad. Via stacking. Applicable where high density features are required. Benefits useful in sequential lamination processes.

Figure 5-8 Examples of Type VII Filled and Capped Via

<!-- image -->

Concerns: Adhesion of the metallized coating to the via fill and copper pad. Copper thickness. The planarity between the fill material and the copper surface. CTE mismatch between the fill material and metallization resulting in air gap (fill material shrinkage). Less than 100% via fill may result in a metallized cap that is too thin or a dimple that can also cause entrapped air resulting in voids in BGA solder joints. Pinholes in the metallized coatings result in non-solderable areas of a land where the capped via is intended for a BGA solder joint. Reduced solder volume is also a concern with dimples.

5.8 Partially Filled Via Though not identified as a via protection type, this document does recognize manufacturing processes where solder mask flows into the hole during liquid solder mask application, without intending to provide complete coverage or protection, and may result in partial plugging (see Figure 5-9). This is not acceptable with bare copper surface finishes (see 3.4). The illustrations below show typical via configurations when liquid solder mask is used with no specific process for via protection. Inconsistency of coverage can lead to a mix of all configurations on the same board. Process should not be implemented over bare copper. If the final finish is HASL the center of the hole wall will be bare copper.

6 PERFORMANCE TRADEOFFS

There are a number of tradeoffs or concerns that the PWB designer and manufacturer should consider when evaluating a method of via protection.

6.1 Planarity In assembly it is typically important to have a relatively planar surface to the PWB as it is received from the PWB fabricator. In many cases components will be placed directly over protected vias and, if there is any bulge or bump at the via, the component will not sit firmly onto its mounting pad(s) creating the potential for a soldering defect(s). Dimples can cause entrapped air resulting in voids in BGA solder joints.

It is also very important to maintain this planarity through assembly soldering. Bulged, erupted or popped vias can dislocate components and cause soldering defects as above.

6.2 Via Metallization When vias are to be solder coated, before they are coated the plug of material in the hole can become loose as the solder reflows or melts during soldering processes. This can lead to either plug failure or a soldering defect. However, if this type of plug does fail, the copper of the hole wall is protected from chemical attack by the solder coating. Even though this practice may be more prone to failure, the consequences, in terms of long-term reliability, may not be as much of a concern.

Figure 5-9 Examples of Partially Filled Vias

<!-- image -->

Bare copper protected vias are more likely to survive assembly processing because the plugging material can maintain excellent adhesion to the copper surface, just the same as to circuitry (assuming that an approved solder mask material is used). However, if a failure did occur, there could be a long-term reliability concern in that it could expose bare copper to chemistry and the environment. If the circuitry was gold plated, however, there would essentially be no concern from failed via protection because of the inertness of the gold.

6.3 Moisture Absorption Because materials used to plug vias can absorb moisture during storage, it may be necessary to bake PWBs with protected vias before soldering to eliminate absorbed moisture from the holes. This should increase the reliability of the via protection material through the soldering process.

6.4 Cleanliness Concerns If the plug is loosened the potential for flux and other contaminates being trapped between the loosened plug and hole wall is great. These contaminates can cause problems with surface resistivity performance if the PWB is to be used in an environment where there is moisture. Single-sided tents pose a similar concern for the entrapment of chemistries.

6.5 Use of Conformal Coating If the final use of the assembled board is in an environment with greater than 80% relative humidity, conformal coating should be used to slow down any moisture absorption. Use of a conformal coating would be strongly recommended when only one side of a via is protected for any use environment as the presence would further protect the opposite side of the via.

7 SAMPLE DESIGNS

The following is a design example of a Type II-b tented and covered via structure within a Ball Grid Array (BGA) footprint design on a PWB.

Typical Materials for Tented and Covered:

• Dry Film thickness: 0.058 mm [0.0023 in] as applied; 0.046 mm [0.0018 in] as cured.
• LPI: thickness: 0.018 mm - 0.030 mm [0.0007 in 0.0012 in] applied and cured.

Figure 7-1 illustrates the 'Tented and Covered' technique as applied to a BGA footprint design. The solderable pad area of the BGA uses a solder mask clearance around the pad as opposed to a solder mask defined pad in which the solder mask overlaps the copper solderable area. The feed-through via represents a typical signal escape routing path (dog bone pattern) and is shown protected from additional soldering processes by the technique. A dry film dot is first applied over the via only, forming the 'tented' feature. Next the entire surface is 'covered' with LPI solder mask except at the solderable openings.

Figure 7-1 Illustration of 'Tented and Covered' Via Protection Method

<!-- image -->

Figure 7-2 illustrates the variables used for calculating the feature sizes of the Type II-b Tented and Covered technique via a dimensioned cross-sectional view of both a PTH and a blind via feature. The design rule is provided in Figure 7-3.

Figure 7-2 Cross-sectional View of Tent and Cover Detail

<!-- image -->

Figure 7-3 illustrates a single hole as a top view illustration to depict the solder mask clearance around a BGA solder pad.

Figure 7-3 Top View Illustration of Solder Mask Clearance around a BGA Pad

<!-- image -->

Figure 7-4 illustrates a single hole as a top view illustration to depict the overlap detail of the tent and cover technique.

Figure 7-4 Top View Illustration of Overlap Detail for Tent and Covered Vias

<!-- image -->

The simplified formula also shown was developed to function as a design rule to quickly calculate the aperture sizes required to produce the artworks for a 2-step process. The noted exception was created as a safeguard to maintain feature sizes within the resolution capability of the solder mask materials. The basic goal of the applied rule is to produce a dot that splits the difference of the available annular ring.

8 EXAMPLES OF DRAWING NOTES

The following are examples of via protection call-outs, or notes, in printed board documentation:

Good procurement documentation will provide notation indicating how via protection is to be employed in the fabrication of the PWB to ensure that the user receives the desired product.

Note for Type V Vias

Indicated vias to be resin filled as described within 5.5 of IPC-4761 (Type V Filled Via). Selection of fill material shall be pre approved by user. Reduction of surface copper wrap due to via planarization shall not be greater than 50% of the specified minimum plated surface copper for that via structure.

Note for Type II-b Vias

All vias 0.305 mm [0.012 in] diameter or less shall be tented on both sides using a conforming dry film solder mask per IPC-SM-840, Class H prior to the application of LPI solder mask to create a Type II-b tented and covered structure (see 5.2 of IPC-4761). The dry film solder mask shall completely cover the via and shall not extend beyond the associated land. The combined height of the LPI solder mask and dry film solder mask shall not exceed 0.076 mm [0.003 in] above the covered pad surface. The height shall be verified by microsection evaluation of a representative quality conformance coupon.

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Chicago, IL 60678-1349

Fax or mail application with credit card payment to:

IPC

• 3000 Lakeside Drive, Suite 309S

Bannockburn , IL. 60015 - 1249

Tel: 847-615 - 7100

Fax: 847-615 - 7105

• Overnight deliveries to this address only

Please bill my credit card (circle one) for $_______________________

• [ ] ❏ MasterCard

• [ ] ❏ American Express

• [ ] ❏ Visa

• [ ] ❏ Diners Club

Account No

Expiration Date

Name of Card Holder

Authorized Signature

MEMBERSHIP DUES SCHEDULE

Please check one:

• [ ] ❏ $1,000.00 - Annual dues for Primary Site Membership Twelve months of IPC membership begins from the time the application and payment are received at the IPC office.

❏ $800.00 - Annual dues for Additional Facility Membership An additional membership for a site within an organi- zation where there already is a current Primary Site IPC membership.

• [ ] ❏ $600.00** - Annual dues for an independent PCB/PWA fabricator or independent EMSI provider with annual sales of less than $1,000,000.00. USD ** Please provide proof of annual sales.

• [ ] ❏ $250.00 - Annual dues for Government Agency or Academic Technical Liaison Membership. Must be not-for-profit organization.

TMRC MEMBERSHIP

• [ ] ❏ Please send information on participation in the Technology Market Research Council (TMRC) program. Only current IPC member sites are eligible to participate in this calendar year program, which is available for an additional fee.

• [ ] ❏ Yes, sign up our site now:

$950.00 - Primary TMRC member site

$400.00 - Additional facility TMRC member. Another site within our organization is already a TMRC program participant.

Name of Primary Contact for all TMRC matters:

Phone

Fax

E-Mail

PAYMENT INFORMATION

Phone Number

QUESTIONS?

Call the IPC Member Services Department in Bannockburn, Illinois, at 847-597-2809 or 847-597-2872, or fax us at 847-615-7105.

E-mail: JeanetteFerdman@ipc.org SusanStorck@ipc.org

Application for IPC Site Membership

INFORMATION DISTRIBUTION

IPC has significant member benefits available to a wide range of individuals within your organization. To ensure that your facility takes advantage of these benefits, please provide the name of the individual responsible for each of the functional areas listed below. If one person has multiple responsibilities, please list that person's name as many times as necessary.

Chief Executive:

Name

Title/Mail Stop

Phone

Fax

E-mail

Sales/Marketing:

Name

Title/Mail Stop

Phone

Fax

E-mail

Finance (CFO)

Name

Title/Mail Stop

Phone

Fax

E-mail

Human Resources

Name

Title/Mail Stop

Phone

Fax

E-mail

Environmental/Safety

Name

Title/Mail Stop

Phone

Fax

E-mail

Design/Artwork

Name

Title/Mail Stop

Phone

Fax

E-mail

Product Assurance

Name

Title/Mail Stop

Phone

Fax

E-mail

Manufacturing

Name Training

Title/Mail Stop

Phone

Fax

E-mail

Name

Title/Mail Stop

Phone

Fax

E-mail

Purchasing

Name

Title/Mail Stop

Phone

Fax

E-mail

IPC REVIEW SUBSCRIPTION LIST

One of the many benefits of IPC membership is a subscription to the IPC Review, our monthly magazine. Please list below the names of individuals who would benefit from receiving our magazine, which provides information about the industry, IPC news, and other items of interest. A subscription for the IPC Primary Contact person is entered automatically.

Name

Title/Mail Stop

Name

Title/Mail Stop

Name

Title/Mail Stop

Name

Title/Mail Stop

Name

Title/Mail Stop

Name

Title/Mail Stop

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Standard Improvement For

m IP

The purpose of this form is to provide the Technical Committee of IPC with input from the industry regarding usage of the subject standard.

Individuals or companies are invited to submit comments to IPC. All comments will be collected and dispersed to the appropriate committee(s).

C -4761

If you can provide input, please complete this form and return to:

IPC

3000 Lakeside Drive, Suite 309S Bannockburn, IL 60015-1219 Fax 847 615.7105

E-mail: answers@ipc.org

1. I recommend changes to the following:

• [ ] Requirement, paragraph number

• [ ] Test Method number

, paragraph number

The referenced paragraph number has proven to be:

• [ ] Unclear

• [ ] Too Rigid

• [ ] In Error

• [ ] Other

2. Recommendations for correction:

3. Other suggestions for document improvement:

Submitted by:

Name

Telephone

Company

E-mail

Address

City/State/Zip

Date

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